Abstract
In this work, we present GaAs material and device-structure optimization studies that have led to achieve a open-circuit voltage of approx.1 Volt and a best cell efficiency of 18.2% under AM1.5G illumination, for a 4-cm2-area GaAs cell on commercially-available, cast, optical-grade polycrystalline Ge substrate. This V∝ is almost 70 mV higher than on our previously-reported best GaAs cell on similar substrates. We discuss the growth of high-quality GaAs-AlGaAs layers, across the various crystalline orientations of a polycrystalline Ge substrate, important for obtaining good device performance. Optimization studies of the minority-carrier properties of GaAs layers on poly-Ge substrates have revealed that lifetime-spread across various grains can be reduced through the use of lower doping for the Al0.8Ga0.2As confinement layers. The cell-structure optimization procedures for improved V∝ and cell efficiency, include the use of thinner emitters, a spacer layer near the p+-n junction and an improved window layer. An experimental study of dark currents in these junctions, with and without the spacer, as a function of temperature (77K to 288K) is presented indicating that the spacer reduces the tunneling contribution to dark current.
Original language | American English |
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Pages | 31-36 |
Number of pages | 6 |
DOIs | |
State | Published - 1996 |
Event | Proceedings of the 1996 25th IEEE Photovoltaic Specialists Conference - Washington, DC, USA Duration: 13 May 1996 → 17 May 1996 |
Conference
Conference | Proceedings of the 1996 25th IEEE Photovoltaic Specialists Conference |
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City | Washington, DC, USA |
Period | 13/05/96 → 17/05/96 |
NREL Publication Number
- NREL/CP-22374