Abstract
As novel absorber materials are developed and screened for their photovoltaic (PV) properties, the challenge remains to reproducibly test promising candidates for high-performing PV devices. Many early-stage devices are prone to device shunting due to pinholes in the absorber layer, producing 'false-negative' results. Here, we demonstrate a device engineering solution toward a robust device architecture, using a two-step absorber deposition approach. We use tin sulfide (SnS) as a test absorber material. The SnS bulk is processed at high temperature (400 degrees C) to stimulate grain growth, followed by a much thinner, low-temperature (200 degrees C) absorber deposition. At a lower process temperature, the thin absorber overlayer contains significantly smaller, densely packed grains, which are likely to provide a continuous coating and fill pinholes in the underlying absorber bulk. We compare this two-step approach to the more standard approach of using a semi-insulating buffer layer directly on top of the annealed absorber bulk, and we demonstrate a more than 3.5x superior shunt resistance Rsh with smaller standard error ..sigma..Rsh. Electron-beam-induced current (EBIC) measurements indicate a lower density of pinholes in the SnS absorber bulk when using the two-step absorber deposition approach. We correlate those findings to improvements in the device performance and device performance reproducibility.
Original language | American English |
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Pages (from-to) | 22664-22670 |
Number of pages | 7 |
Journal | ACS Applied Materials and Interfaces |
Volume | 8 |
Issue number | 34 |
DOIs | |
State | Published - 2016 |
NREL Publication Number
- NREL/JA-5J00-67109
Keywords
- device shunting
- novel absorber materials
- performance reliability
- photovoltaics
- thin-films
- tin sulfide