APIVT-Grown Silicon Thin Layers and PV Devices

T. H. Wang, T. F. Ciszek, M. R. Page, R. E. Bauer, Q. Wang, M. D. Landry

Research output: Contribution to conferencePaperpeer-review

3 Scopus Citations


Large-grained (5-20 μm) polycrystalline silicon layers have been grown at intermediate temperatures of 750°-950°C directly on foreign substrates without a seeding layer by iodine vapor transport at atmospheric pressure with rates as high as 3 μm/min. A model is constructed to explain the atypical temperature dependence of growth rate. We have also used this technique to grow high-quality epitaxial layers on heavily doped CZ-Si and on upgraded MG-Si substrates. Possible solar cell structures of thin-layer polycrystalline silicon on foreign substrates with light trapping have been examined, compared, and optimized by two-dimensional device simulations. The effects of grain boundary recombination on device performance are presented for two grain sizes of 2 and 20 μm. We found that 104 cm/s recombination velocity is adequate for 20-μm grain-sized thin silicon, whereas a very low recombination velocity of 103 cm/s must be accomplished in order to achieve reasonable performance for a 2-μm grain-sized polycrystalline silicon device.

Original languageAmerican English
Number of pages4
StatePublished - 2002
Event29th IEEE Photovoltaic Specialists Conference - New Orleans, LA, United States
Duration: 19 May 200224 May 2002


Conference29th IEEE Photovoltaic Specialists Conference
Country/TerritoryUnited States
CityNew Orleans, LA

Bibliographical note

For preprint version including full text online document, see NREL/CP-520-31441

NREL Publication Number

  • NREL/CP-520-33686


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