Coincident Site Lattice-Matched Growth of Semiconductors on Substrates Using Compliant Buffer Layers

Andrew Norman (Inventor)

Research output: Patent

Abstract

A method of producing semiconductor materials and devices that incorporate the semiconductor materials are provided. In particular, a method is provided of producing a semiconductor material, such as a III-V semiconductor, on a silicon substrate using a compliant buffer layer, and devices such as photovoltaic cells that incorporate the semiconductor materials. The compliant buffer material and semiconductor materials may be deposited using coincident site lattice-matching epitaxy, resulting in a close degree of lattice matching between the substrate material and deposited material for a wide variety of material compositions. The coincident site lattice matching epitaxial process, as well as the use of a ductile buffer material, reduce the internal stresses and associated crystal defects within the deposited semiconductor materials fabricated using the disclosed method. As a result, the semiconductor devices provided herein possess enhanced performance characteristics due to a relatively low density of crystal defects.
Original languageAmerican English
Patent number9,425,249 B2
Filing date23/08/16
StatePublished - 2016

NREL Publication Number

  • NREL/PT-5K00-67206

Keywords

  • III-V semiconductors
  • semiconductor materials
  • silicon substrates

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