Abstract
This contribution explores an alternate route to forming pinhole-based poly-Si/dielectric/c-Si passivating contacts. The method utilizes controlled dielectric breakdown or electroforming to produce nanoscale pinholes in a thick (non-tunnelling) dielectric which, when annealed, allows dopant atoms to pass from doped poly-Si through the pinholes and into the c-Si wafer, forming conductive pathways. We show that the pinholes lose passivation after electroforming but can be repassivated with a forming gas anneal. N-type contacts show contact resistivities of ~20 mOhm-cm2, but p-type contacts are ~100 mOhm-cm2. Devices show a distinct kink in the J-V curve indicative of a barrier to transport. The method can be expanded to optimized dielectric passivation stacks (not just thin, single layers) and can be formed in parallel over the faces of the wafer in selected areas (pinholes only under the grid lines).
Original language | American English |
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Number of pages | 6 |
DOIs | |
State | Published - 27 Jun 2023 |
Event | 12th International Conference on Crystalline Silicon Photovoltaics, SiliconPV 2022 - Hybrid, Konstanz, Germany Duration: 28 Mar 2022 → 30 Mar 2022 |
Conference
Conference | 12th International Conference on Crystalline Silicon Photovoltaics, SiliconPV 2022 |
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Country/Territory | Germany |
City | Hybrid, Konstanz |
Period | 28/03/22 → 30/03/22 |
Bibliographical note
Publisher Copyright:© 2023 Author(s).
NREL Publication Number
- NREL/CP-5900-87011
Keywords
- dielectric properties
- electroforming
- semiconductor device fabrication
- semiconductor materials