Development of Application Function Blocks for Power-Hardware-in-the-Loop Testing of Grid-Connected Inverters: Preprint

Stability and accuracy of the PHIL platform has been a common problem and challenging issue for a long time, thus continuous efforts and research have been devoted to developing interface algorithms to improve upon this. Some of existing works exhibit promising solutions to compensate the errors in the PHIL platform. However, there is a need to harmonize various solutions into a standard framework that provides a general solution for various PHIL test beds and that can be reused with minimum modifications to avoid extra effort. A good way to do this is by using application function blocks (AFBs), which are model-based and can be developed as a standard library component, thus achieving satisfactory reusability and reconfigurability for various platforms. Since PHIL simulation has the flexibility of the software simulation, proper functions can be easily implemented in the digital real-time simulator (DRTS) to preprocess the reference signal before sending it to the power amplifier. Therefore, this paper aims to develop standard AFBs in DRTS for the PHIL interface to test grid-connected inverters. The PHIL interface algorithm is separated into five AFBs that will be presented in detail in this paper.