Effect of Surface Texture on Pinhole Formation in SiOx-Based Passivated Contacts for High-Performance Silicon Solar Cells

Harvey Guthrey, Caroline Lima Salles, Abhijit Kale, William Nemeth, Matthew Page, Sumit Agarwal, David Young, Mowafak Al-Jassim, Paul Stradins

Research output: Contribution to journalArticlepeer-review

22 Scopus Citations

Abstract

High-efficiency silicon solar cells rely on some form of passivating contact structure to reduce recombination losses at the crystalline silicon surface and losses at the metal/Si contact interface. One such structure is polycrystalline silicon (poly-Si) on oxide, where heavily doped poly-Si is deposited on a SiOx layer grown directly on the crystalline silicon (c-Si) wafer. Depending on the thickness of the SiOx layer, the charge carriers can cross this layer by tunneling (<2 nm SiOx thickness) or by direct conduction through disruptions in the SiOx, often referred to as pinholes, in thicker SiOx layers (>2 nm). In this work, we study structures with tunneling- or pinhole-like SiOx contacts grown on pyramidally textured c-Si wafers and expose variations in the SiOx layer properties related to surface morphology using electron-beam-induced current (EBIC) imaging. Using EBIC, we identify and mark regions with potential pinholes in the SiOx layer. We further perform high-resolution transmission electron microscopy on the same areas, thus allowing us to directly correlate locally enhanced carrier collection with variations in the structure of the SiOx layer. Our results show that the pinholes in the SiOx layer preferentially form in different locations based on the annealing conditions used to form the device. With greater understanding of these processes and by controlling the surface texture geometry, there is potential to control the size and spatial distribution of oxide disruptions in silicon solar cells with poly-Si on oxide-type contacts; usually, this is a random phenomenon on polished or planar surfaces. Such control will enable us to consistently produce high-efficiency devices with low recombination currents and low junction resistances using this contact structure.

Original languageAmerican English
Pages (from-to)55737-55745
Number of pages9
JournalACS Applied Materials and Interfaces
Volume12
Issue number50
DOIs
StatePublished - 16 Dec 2020

Bibliographical note

Publisher Copyright:
©

NREL Publication Number

  • NREL/JA-5K00-77115

Keywords

  • EBIC
  • passivating contact
  • pinholes
  • silicon solar cell
  • surface texture

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