Abstract
The present disclosure relates to a passivating contact that includes a dielectric layer constructed of a first material, an intervening layer constructed of a second material, and a substrate constructed of a semiconductor, where the dielectric layer is positioned between the substrate and the intervening layer, the dielectric layer has a first thickness, and the substrate has a second thickness. The passivating contact also includes a plurality of conductive pathways that include the second material and pass through the first thickness, the second material penetrates into the second thickness forming a plurality of penetrating regions within the substrate, and the plurality of conductive pathways are configured to allow current to pass through the first thickness.
Original language | American English |
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Patent number | 11,961,925 B2 |
Filing date | 16/04/24 |
State | Published - 2024 |
NREL Publication Number
- NREL/PT-5900-89657
Keywords
- dielectric layer
- III-V alloy
- plurality of conductive pathways