Abstract
Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a substrate having a crystalline surface with a known lattice parameter (a). The method further includes growing a crystalline semiconductor layer on the crystalline substrate surface by coincident site lattice matched epitaxy, without any buffer layer between the crystalline semiconductor layer and the crystalline surface of the substrate. The crystalline semiconductor layer will be prepared to have a lattice parameter (a') that is related to the substrate lattice parameter (a). The lattice parameter (a') maybe related to the lattice parameter (a) by a scaling factor derived from a geometric relationship between the respective crystal lattices.
Original language | American English |
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Patent number | 8,507,365 |
Filing date | 13/08/13 |
State | Published - 2013 |
Bibliographical note
Assignee: Alliance for Sustainable Energy, LLC (Golden, CO)NREL Publication Number
- NREL/PT-5200-62031