Investigation of Static Performances of 1.2kV 4H-SiC MOSFETs Fabricated Using All 'Room Temperature' Ion Implantations

Stephen Mancini, Seung Jang, Zeyu Chen, Dongyoung Kim, Alex Bialy, Balaji Raghotamacher, Michael Dudley, Nadeemullah Mahadik, Robert Stahlbush, Mowafak Al-Jassim, Woongje Sung

Research output: Contribution to journalArticlepeer-review

Abstract

Several different designs of 1.2kV-rated 4H-SiC MOSFETs have been successfully fabricated under various ion implantation conditions. Implantation conditions consisted of different P+ profiles and implantation temperatures of both room temperature (25 degrees C) and elevated temperatures (600 degrees C) in order to monitor subsequent lattice damage. Through the use of X-Ray topography, SEM imaging, and electrical measurements, it was shown that room temperature implanted devices can mimic the static performances of high temperature implanted MOSFETs and reduce lattice damage suffered during the fabrication process, when the dose of high energy implants are suppressed.
Original languageAmerican English
Pages (from-to)150-158
Number of pages9
JournalIEEE Journal of the Electron Devices Society
Volume12
DOIs
StatePublished - 2024

NREL Publication Number

  • NREL/JA-5K00-89005

Keywords

  • 3rd quadrant
  • 4H-silicon carbide (SiC)
  • breakdown voltage
  • design approach
  • leakage current
  • MOSFET
  • room temperature implantation
  • SEM-analysis
  • X-ray topography

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