Abstract
Disclosed embodiments include methods of fabricating a semiconductor layer or device and devices fabricated thereby. The methods include, but are not limited to, providing a substrate having a cubic crystalline surface with a known lattice parameter and growing a cubic crystalline group III-nitride alloy layer on the cubic crystalline substrate by coincident site lattice matched epitaxy. The cubic crystalline group III-nitride alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter of the substrate (a). The group III-nitride alloy may be a cubic crystalline In.sub.xGa.sub.yAl.sub.1-x-yN alloy. The lattice parameter of the In.sub.xGa.sub.yAl.sub.1-x-yN or other group III-nitride alloy may be related to the substrate lattice parameter by (a')= 2(a) or (a')=(a)/ 2. The semiconductor alloy may be prepared to have a selected band gap.
Original language | American English |
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Patent number | 8,961,687 B2 |
Filing date | 24/02/15 |
State | Published - 2015 |
Bibliographical note
Assignee: Alliance for Sustainable Energy, LLC (Golden, CO)NREL Publication Number
- NREL/PT-5K00-65190
Keywords
- crystalline substrates
- device fabrication
- semiconductors