Lattice Matched Semiconductor Growth on Crystalline Metallic Substrates

Andrew Norman (Inventor)

Research output: Patent

Abstract

Methods of fabricating a semiconductor layer or device and said devices are disclosed. The methods include but are not limited to providing a metal or metal alloy substrate having a crystalline surface with a known lattice parameter (a). The methods further include growing a crystalline semiconductor alloy layer on the crystalline substrate surface by coincident site lattice matched epitaxy. The semiconductor layer may be grown without any buffer layer between the alloy and the crystalline surface of the substrate. The semiconductor alloy may be prepared to have a lattice parameter (a') that is related to the lattice parameter (a). The semiconductor alloy may further be prepared to have a selected band gap.
Original languageAmerican English
Patent number8,575,471
Filing date5/11/13
StatePublished - 2013

Bibliographical note

Assignee: Alliance for Sustainable Energy, LLC (Golden, CO)

NREL Publication Number

  • NREL/PT-5200-62091

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