Local Resistance Measurement for Degradation of c-Si Heterojunction with Intrinsic Thin Layer (HIT) Solar Modules: Preprint

Crystalline silicon (C-Si) heterojunction with intrinsic thin layer (HIT) technology is one of highest efficiency C-Si-based solar cell, and has been deployed in solar farm in large scales for over 10 years. HIT modules degrade in a typical rate of less than 1% annually in solar fields with dominate degradation in open-circuit voltage (Voc). However, detailed mechanisms can differ from module to module. In some cells, although the photoluminescence (PL) intensity does not degrade, the electroluminescence (EL) degrades significantly in some cell areas. This difference in the PL and EL intensity and nonuniformity point to a local series resistance (SR) increase with the long-term field deployment.To directly measure the local SR, we have cored out the local EL-degraded area and measured the local SR. We have measured the sheet resistance by 4-point-probe and local nm-scale resistance using scanning spreading resistance microscopy (SSRM). The results by 4-point-probes show scattered sheet resistance that can be caused by nonuniform current path through the transparent conductive oxide (TCO) layer and through the underneath C-Si device emitter and more. In contrast, the SSRM results indicate a relatively uniform and non-degraded TCO resistivity. SSRM is an atomic force microscopy (AFM)-based two-terminal resistance mapping technique, measuring the local resistance in nm-volume beneath the probe. The consistent resistances measured on the control and degraded samples can exclude the degradation of TCO resistance. Further local nm-scale resistance measurement to probe deep into the C-Si device layers by milling away the materials layer by layer is underway. It is also planned and will be presented to measure the resistances of the HIT multi-layers on cross-sections of the cored sample pieces, targeting at isolating the resistance degradation mechanism.