Abstract
Power-hardware-in-the-loop (PHIL) is a simulation tool that can support electrical systems engineers in the development and experimental validation of novel, advanced control schemes that ensure the robustness and resiliency of electrical grids that have high penetrations of low-inertia variable renewable resources. With PHIL, the impact of the device under test on a generation or distribution system can be analyzed using a real-time simulator (RTS). PHIL allows for the interconnection of the RTS with a 7 megavolt ampere (MVA) power amplifier to test multi-megawatt renewable assets available at the National Wind Technology Center (NWTC). This paper addresses issues related to the development of a PHIL interface that allows testing hardware devices at actual scale. In particular, the novel PHIL interface algorithm and high-speed digital interface, which minimize the critical loop delay, are discussed.
Original language | American English |
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Number of pages | 10 |
State | Published - 2017 |
Event | 2017 IEEE 18th Workshop on Control and Modeling for Power Electronics (COMPEL) - Stanford, California Duration: 9 Jul 2017 → 12 Jul 2017 |
Conference
Conference | 2017 IEEE 18th Workshop on Control and Modeling for Power Electronics (COMPEL) |
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City | Stanford, California |
Period | 9/07/17 → 12/07/17 |
Bibliographical note
See NREL/CP-5D00-70291 for paper as published in IEEE proceedingsNREL Publication Number
- NREL/CP-5D00-68856
Keywords
- microgrids
- PHIL
- power grids
- power quality
- power system faults
- test facilities
- wind energy integration