@misc{38eb25de5e624934b3a46fa9f217209c,
title = "PHIL Interface Design for Use With a Voltage-Regulated Amplifier",
abstract = "Power hardware-in-the-loop (PHIL) has emerged as a leading strategy to thoroughly assess the impact of proprietary inverter controls on a specific power system. The development of a PHIL test bed typically involves an inverter under test, a power amplifier, controllable DC supply, and a digital real-time simulator (DRTS) to simulate the power system under study. As a result of PHIL nonidealities, a form of digital compensation within the DRTS is used, which is commonly referred to as a PHIL interface. Many existing methods use legacy power amplifiers that do not contain internal voltage regulation. These existing interface methods are based around a voltage regulator within the DRTS and do not consider the interaction with the controls in newer amplifiers. In this study, a three-step approach of PHIL interface development for modern power amplifiers with built-in voltage regulation is introduced and is validated in hardware with a 30-kW grid-following inverter.",
keywords = "DRTS, grid-following inverter, illusionary reactive power, PHIL, PHIL interface, power hardware-in-the-loop, voltage-regulated power amplifier",
author = "Toby Meyers and Kumaraguru Prabakar and Annabelle Pratt and Soumya Tiwari and John Fossum",
year = "2023",
language = "American English",
series = "Presented at the 2023 IEEE PES Innovative Smart Grid Technologies Latin America (ISGT-LA), 6-9 November 2023, San Juan, Puerto Rico",
publisher = "National Renewable Energy Laboratory (NREL)",
address = "United States",
type = "Other",
}