Potential-Induced Degradation-Delamination Mode in Crystalline Silicon Modules: Preprint

Peter Hacke, Michael Kempe, Jichao Li, Yu-Chen Shen

Research output: Contribution to conferencePaper

Abstract

A test sequence producing potential-induced degradation-delamination (PID-d) in crystalline silicon modules has been tested and found comparable under visual inspection to cell/encapsulant delamination seen in some fielded modules. Four commercial modules were put through this sequence, 85 degrees C, 85%, 1000 h damp heat, followed by an intensive PID stress sequence of 72 degrees C, 95% RH, and -1000 V, with the module face grounded using a metal foil. The 60 cell c-Si modules exhibiting the highest current transfer (4.4 center dot 10-4 A) exhibited PID-d at the first inspection after 156 h of PID stress. Effects promoting PID-d are reduced adhesion caused by damp heat, sodium migration further reducing adhesion to the cells, and gaseous products of electrochemical reactions driven by the applied system voltage. A new work item proposal for an IEC test standard to evaluate for PID-d is anticipated.
Original languageAmerican English
Number of pages9
StatePublished - 2018
Event2016 Workshop on Crystalline Silicon Solar Cells and Modules: Materials and Processes - Vail, Colorado
Duration: 28 Aug 201631 Aug 2016

Conference

Conference2016 Workshop on Crystalline Silicon Solar Cells and Modules: Materials and Processes
CityVail, Colorado
Period28/08/1631/08/16

NREL Publication Number

  • NREL/CP-5J00-67256

Keywords

  • delamination
  • module testing
  • potential-induced degradation

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