Abstract
Systems and methods for semiconductor device PN junction fabrication are provided. In one embodiment, a method for fabricating an electrical device having a P-N junction comprises: depositing a layer of amorphous semiconductor material onto a crystalline semiconductor base, wherein the crystalline semiconductor base comprises a crystalline phase of a same semiconductor as the amorphous layer; and growing the layer of amorphous semiconductor material into a layer of crystalline semiconductor material that is epitaxially matched to the lattice structure of the crystalline semiconductor base by applying an optical energy that penetrates at least the amorphous semiconductor material.
Original language | American English |
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Patent number | 8,895,416 B2 |
Filing date | 25/11/14 |
State | Published - 2014 |
Bibliographical note
Assignee: Alliance for Sustainable Energy, LLC (Golden, CO)NREL Publication Number
- NREL/PT-5J00-64493
Keywords
- device fabrication
- PN junction
- semiconductors