Stress Management in Sub-90-nm Transistor Architecture

Research output: Contribution to journalArticlepeer-review

Original languageAmerican English
Pages (from-to)1740-1743
Number of pages4
JournalIEEE Transactions on Electron Devices
Volume51
Issue number10
DOIs
StatePublished - 2004

NREL Publication Number

  • NREL/JA-590-37424

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