System Voltage Potential-Induced Degradation Mechanisms in PV Modules and Methods for Test

Peter Hacke, Kent Terwilliger, Ryan Smith, Stephen Glick, Joel Pankow, Michael Kempe, Sarah Kurtz Ian Bennett, Mario Kloos

Research output: Contribution to conferencePaperpeer-review

167 Scopus Citations

Abstract

Over the past decade, degradation and power loss have been observed in PV modules resulting from the stress exerted by system voltage bias. This is due in part to qualification tests and standards that do not adequately evaluate for the durability of modules to the long-term effects of high voltage bias experienced in fielded arrays. High voltage can lead to module degradation by multiple mechanisms. The extent of the voltage bias degradation is linked to the leakage current or coulombs passed from the silicon active layer through the encapsulant and glass to the grounded module frame, which can be experimentally determined; however, competing processes make the effect non-linear and history-dependent. Appropriate testing methods and stress levels are described that demonstrate module durability to system voltage potential-induced degradation (PID) mechanisms. This information, along with outdoor testing that is in progress, is used to estimate the acceleration factors needed to evaluate the durability of modules to system voltage stress. Na-rich precipitates are observed on the cell surface after stressing the module to induce PID in damp heat with negative bias applied to the active layer.

Original languageAmerican English
Pages814-820
Number of pages7
DOIs
StatePublished - 2011
Event37th IEEE Photovoltaic Specialists Conference, PVSC 2011 - Seattle, WA, United States
Duration: 19 Jun 201124 Jun 2011

Conference

Conference37th IEEE Photovoltaic Specialists Conference, PVSC 2011
Country/TerritoryUnited States
CitySeattle, WA
Period19/06/1124/06/11

Bibliographical note

See NREL/CP-5200-50716 for preprint

NREL Publication Number

  • NREL/CP-5200-55714

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