Technology Support for Initiation of High-Throughput Processing of Thin-Film CdTe PV Modules: Phase III Final Technical Report, 14 March 1997-1 April 1998

This report describes work performed by Solar Cells, Inc. (SCI), during Phase III of this subcontract. As a result of the R&D effort, the vapor transport deposition (VTD) process achieved a status in which linear coating speeds in excess of 8 ft/min were achieved for the semiconductor, equal to about two modules per minute, or 144 kW per 24-h day. The process has been implemented in a productionline, which is capable of round-the-clock continuous production of coated substrates 120 cm x 60 cm in size at a rate of 1 module every four minutes, equal to 18 kW/day. Currently, the system cycle time is limited by the rate of glass introduction into the system and glass heating, but not by the rate of the semiconductor deposition. A new SCI record efficiency of 14.1% was achieved for thecells. For the modules produced by the rapit VTD process, the best efficiency achieved thus far is 8.4%, compared with the record of 9.1% for the close-spaced sublimation process. Three arrays and one set of modules on outdoor stability tests for up to 3 years continue to show excellent stability. The National CdTe Team has implemented an Accelerated Life Testing program and has identified ahigh-temperature degradation process. The effort in SCI's Dot-Matrix process has resulted in the development of one version of the process, showing PV performance comparable to the existing 'line-patterning' process done by laser scribing. The capability of patterning of transparent conducting oxide layers has been demonstrated by an alternative non-laser process.