Abstract
Most silicon PV road maps forecast a continued reduction in wafer thickness, despite rapid declines in the primary incentive for doing so - polysilicon feedstock price. Another common feature of most silicon-technology forecasts is the quest for ever-higher device performance at the lowest possible costs. The authors present data from device-performance and manufacturing- and system-installation cost models to quantitatively establish the incentives for manufacturers to pursue advanced (thin) wafer and (high efficiency) cell technologies, in an age of reduced feedstock prices. This analysis exhaustively considers the value proposition for high lifetime (p-type) silicon materials across the entire c-Si PV supply chain.
Original language | American English |
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Pages | 3238-3241 |
Number of pages | 4 |
DOIs | |
State | Published - 2012 |
Event | 38th IEEE Photovoltaic Specialists Conference, PVSC 2012 - Austin, TX, United States Duration: 3 Jun 2012 → 8 Jun 2012 |
Conference
Conference | 38th IEEE Photovoltaic Specialists Conference, PVSC 2012 |
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Country/Territory | United States |
City | Austin, TX |
Period | 3/06/12 → 8/06/12 |
Bibliographical note
See CP-6A20-55477 for preprintNREL Publication Number
- NREL/CP-6A20-56932
Keywords
- bulk lifetime
- Czochralski process
- manufacturing cost
- monocrystalline silicon