Threaded Multi-Core GEMM with MoA and Cache-Blocking: Preprint

Stephen Thomas; Lenore Mullin; Kasia Swirydowicz; Rishi Khan

Threaded Multi-Core GEMM with MoA and Cache-Blocking: Preprint

Stephen Thomas, Lenore Mullin, Kasia Swirydowicz, Rishi Khan

Computational Science

Research output: Contribution to conference › Paper

Abstract

A threaded multi-core implementation of the high performance dense linear algebra matrix-matrix multiply GEMM kernel is described. This kernel is widely implemented by vendors in the basic linear algebra subroutine BLAS library. The mathematics of arrays (MoA) paradigm due to Mullin (1988) results in contiguous memory accesses by employing outer-product forms. Our performance studies demonstrate that the MoA implementation of double precision DGEMM combined with optimal cache-blocking strategies results in at least a 25% performance gain on the Intel Xeon Skylake processor over the vendor supplied Intel MKL basic linear algebra libraries. Results are presented for the NREL Eagle supercomputer. The multi-core DGEMM achieves over 100 GigaFlops/sec with eight openMP threads.

Original language	American English
Number of pages	13
State	Published - 2022
Event	2021 World Congress in Computer Science, Computer Engineering, & Applied Computing (CSCE'21) - Las Vegas, Nevada Duration: 26 Jul 2021 → 29 Jul 2021

Conference

Conference	2021 World Congress in Computer Science, Computer Engineering, & Applied Computing (CSCE'21)
City	Las Vegas, Nevada
Period	26/07/21 → 29/07/21

NREL Publication Number

NREL/CP-2C00-80530

Keywords

cache-blocking
contiguous memory
mathematics of arrays
shared-memory multi-threading

Access to Document

https://www.nrel.gov/docs/fy22osti/80530.pdf

Cite this

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title = "Threaded Multi-Core GEMM with MoA and Cache-Blocking: Preprint",

abstract = "A threaded multi-core implementation of the high performance dense linear algebra matrix-matrix multiply GEMM kernel is described. This kernel is widely implemented by vendors in the basic linear algebra subroutine BLAS library. The mathematics of arrays (MoA) paradigm due to Mullin (1988) results in contiguous memory accesses by employing outer-product forms. Our performance studies demonstrate that the MoA implementation of double precision DGEMM combined with optimal cache-blocking strategies results in at least a 25% performance gain on the Intel Xeon Skylake processor over the vendor supplied Intel MKL basic linear algebra libraries. Results are presented for the NREL Eagle supercomputer. The multi-core DGEMM achieves over 100 GigaFlops/sec with eight openMP threads.",

keywords = "cache-blocking, contiguous memory, mathematics of arrays, shared-memory multi-threading",

author = "Stephen Thomas and Lenore Mullin and Kasia Swirydowicz and Rishi Khan",

year = "2022",

language = "American English",

note = "2021 World Congress in Computer Science, Computer Engineering, & Applied Computing (CSCE'21) ; Conference date: 26-07-2021 Through 29-07-2021",

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TY - CONF

T1 - Threaded Multi-Core GEMM with MoA and Cache-Blocking: Preprint

AU - Thomas, Stephen

AU - Mullin, Lenore

AU - Swirydowicz, Kasia

AU - Khan, Rishi

PY - 2022

Y1 - 2022

N2 - A threaded multi-core implementation of the high performance dense linear algebra matrix-matrix multiply GEMM kernel is described. This kernel is widely implemented by vendors in the basic linear algebra subroutine BLAS library. The mathematics of arrays (MoA) paradigm due to Mullin (1988) results in contiguous memory accesses by employing outer-product forms. Our performance studies demonstrate that the MoA implementation of double precision DGEMM combined with optimal cache-blocking strategies results in at least a 25% performance gain on the Intel Xeon Skylake processor over the vendor supplied Intel MKL basic linear algebra libraries. Results are presented for the NREL Eagle supercomputer. The multi-core DGEMM achieves over 100 GigaFlops/sec with eight openMP threads.

AB - A threaded multi-core implementation of the high performance dense linear algebra matrix-matrix multiply GEMM kernel is described. This kernel is widely implemented by vendors in the basic linear algebra subroutine BLAS library. The mathematics of arrays (MoA) paradigm due to Mullin (1988) results in contiguous memory accesses by employing outer-product forms. Our performance studies demonstrate that the MoA implementation of double precision DGEMM combined with optimal cache-blocking strategies results in at least a 25% performance gain on the Intel Xeon Skylake processor over the vendor supplied Intel MKL basic linear algebra libraries. Results are presented for the NREL Eagle supercomputer. The multi-core DGEMM achieves over 100 GigaFlops/sec with eight openMP threads.

KW - cache-blocking

KW - contiguous memory

KW - mathematics of arrays

KW - shared-memory multi-threading

M3 - Paper

T2 - 2021 World Congress in Computer Science, Computer Engineering, & Applied Computing (CSCE'21)

Y2 - 26 July 2021 through 29 July 2021

ER -

Threaded Multi-Core GEMM with MoA and Cache-Blocking: Preprint

Abstract

Conference

NREL Publication Number

Keywords

Access to Document

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Cite this